Coplanar Interdigitated Capacitor
Equivalent Circuit
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Coplanar Interdigitated Capacitor

The C_IDC module represents an interdigitated capacitor between center conductor of two coplanar lines. WF is the width of fingers, SF the distance between the fingers and LF the length of the fingers. The dimensions of connected lines at ports are defined using data items addressed by C_ LTYP1 and C_LTYP2. L1 and L2 are the length of coplanar lines connected at ports.


Parameter Description Range of Usage
L1  Length of transmission line connected to the port 1  
L2  Length of transmission line connected to the port 2  
WF Width of fingers n/2.DL (n=1,2,3,...)
SF Slot between fingers n/2.DL (n=1,2,3,...)
LF Length of fingers (LF > SF) n/2.DL (n=2,3,4,...)
NF Number of fingers 2,3,4,...
S Slot between ground and fingers n/2.DL (n=1,2,3,...)
G Gap between ground and feed line n/2.DL (n=1,2,3,...)
WL Width of feed line n/2.DL (n=1,2,3,...)
IDCLEVEL Identification of metal level of the interdigital section 1 or 2 (DEFAULT Foundry)
C_LTYP1 ID of coplanar transmission line applied at ports 1  
C_LTYP2 ID of coplanar transmission line applied at ports 2  
C_SUB ID of coplanar substrate definition  
C_GRID ID of simulation control data  
TEMP ID of element temperature definition used for noise computation  


Equivalent Circuit  

For the modeling of the C_IDC element, a broadband network is used. The electrical coupling betwwen the fingers is represented by the capacitance Cs, whereas the parasitic electric field to the ground is considered by the shunt capacitances Cp1 and Cp2. An ideal transformer (inductances L1 and L2 as well as mutual indactance M) is uesd for the modeling of the magnetic coupling between the fingers. Frequency dependent resistances (R1 and R2) represents the metal losses of the fingers.

The traveling wave effects along the fingers is taken into account. As a result, there is no limitation due to the length of fingers. The equivalent circuit parameters are derived from quasi-static FD-calculations. The connected line at ports are modeled as C_LIN elements and are represented by their characteristic mpedances ZL1, ZL2 and phase constants b1, b2. There is no limitation due to the length of connected lines (L1 and L2).