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Coplanar Metal-Insulator-Metal Capacitor C_MIM

Symbol :

Illustration :

Parameters :

L = Total length of the capacitor
C_LTYPC = ID of coplanar transmission line applied at capacitive section
C_LTYP1 = ID of coplanar transmission line applied at port 1
C_LTYP2 = ID of coplanar transmission line applied at port 2
DIE_IDX = Index to dielectric layer definition for capacitors in currently selected foundry (die_h, die_er, die_td)
C_SUB = ID of coplanar substrate definition
C_GRID = ID of simulation control data
TEMP = ID of element temperature definition used for noise computation

Notes/Equations/References :

  1. The C_MIM module represents a series metal-insulator-metal capacitor (MIM-Capacitor) in coplanar line technique.
  2. The width of capacitor and its distance to the ground are given in a line type addressed by C_LTYPC.
  3. Presently, the C_MIM module is not able to calculate the steps which are made if different line types are used for C_LTYP1, C_LTYP1 and C_LTYPC. Therefore, if a step configuration is used for layout reasons, the effect of such discontinuities are not taken into account during the simulation.
  4. The connected lines addressed by C_LTYP1 and C_LTYP2 must have different CEN_MET.

  5. The index DIE_IDX is used for the selection of the desired dielectric layer in selected foundry. In case of DEFAULT foundry, two different dielectric layers are available (DIE_IDX =0 is not allowed). If DIE_IDX=1, the parameter die_h1, die_er1, die_td1, cap_l1 and cap_os1 are used.
  6. The oversize of lower metal plate is defined by the keyword cap_os in selected foundry. Note, that the slot S in C_LTYPC must be greater than cap_os (Smin = cap_os +DL ).
  7. Note that the effective length of the capacitive section is given by L-2*cap_l. Therefor L has to be greater than 2*cap_l.
  8. If L1 in selected C_GRID are not set to -1 (auto sizing), the minimum value for L1 is:

    L1min=max( W1+2*S1+2*GW1, W2+2*S2+2*GW2,WC+2*SC+2*GWC)

Equivalent Circuit :

For the modeling of C_MIM element, the capacitive region is calculated as two coupled coplanar lines. The matrices of distributed parameters (capacitance per unit length, inductance per unit length, etc.) are determined using quasi-static calculations. See chapter 6 for more information on calculation of coupled line systems.

Layout :

  1. Depending on the metal level of coplanar lines applied to the ports (C_LTYP1 and C_LTYP2), there are different types of capacitors.
  2. If the parameter GW_DEF in C_PROCES is set to a positive non-zero value, this value is used as ground width for layout generation.


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